2020-2021 Sunseeker Telemetry and Lighting System
mpu_ex3_systemPreInit.c
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32 //******************************************************************************
33 // MSP430FR59x Demo - MPU Write protection violation in the device's boot process.
34 // The MPU configuration code is put in the _system_pre_init() for CCS and
35 // __low_level_init() for IAR.
36 //
37 // Description: The MPU segment boundaries are defined by:
38 // Border 1 = 0x6000 [MPUSEGB1 = 0x0600]
39 // Border 2 = 0x8000 [MPUSEGB2 = 0x0800]
40 // Segment 1 = 0x4400 - 0x5FFF
41 // Segment 2 = 0x6000 - 0x7FFF
42 // Segment 3 = 0x8000 - 0x13FFF
43 // Segment 2 is write protected. Any write to an address in the segment 2 range
44 // causes a PUC.
45 //
46 // ACLK = n/a, MCLK = SMCLK = default DCO
47 //
48 //
49 // MSP430FR5969
50 // ---------------
51 // /|\| |
52 // | | |
53 // --|RST |
54 // | |
55 //
56 //******************************************************************************
57 
58 #include "driverlib.h"
59 
60 #if defined(__TI_COMPILER_VERSION__)
61 int _system_pre_init(void)
62 #elif defined(__IAR_SYSTEMS_ICC__)
63 int __low_level_init(void)
64 #elif defined(__GNUC__)
65 int __attribute__((naked, section(".crt_0000init"), used)) _system_pre_init(void)
66 #endif
67 {
68  // Stop WDT
69  WDT_A_hold(WDT_A_BASE);
70 
71  // Configure MPU
72  MPU_initThreeSegmentsParam param = {0};
73  param.seg1boundary = 0x0600;
74  param.seg2boundary = 0x0800;
75  param.seg1accmask = MPU_READ|MPU_WRITE|MPU_EXEC;
76  param.seg2accmask = MPU_READ;
77  param.seg3accmask = MPU_READ|MPU_WRITE|MPU_EXEC;
79 
80  // Disable PUC on violation
81  MPU_disablePUCOnViolation(MPU_BASE,MPU_SECOND_SEG);
82 
83  // Enable NMI event on violation
84  MPU_enableNMIevent(MPU_BASE);
85 
86  // enable MPU operation
87  MPU_start(MPU_BASE);
88 
89  return 1;
90 }
91 
92 void main(void)
93 {
94 
95 }
void main(void)
MPU_initThreeSegmentsParam param
MPU_start(MPU_BASE)
MPU_initThreeSegments(MPU_BASE, &param)
MPU_disablePUCOnViolation(MPU_BASE, MPU_SECOND_SEG)
MPU_enableNMIevent(MPU_BASE)